OISC Utilities

OISC Utilities & Firmware

The ROM images for the CPU's State-Machine and Static Logic needed to be created in a manageable way, along with a simple way of downloading the images (and programs) into the relevant EEPROMs.

State-Machine Generator

A simple way was required to generate the State Machine EEPROM image and modify it as necessary.

I wrote a C# program that allows the definition of the State Machine using fairly human descriptors. The list of state transitions is ordered, such that earlier rules take precedence. See the image for how it is used (Current State, Inputs, Next State) where X=Any State/Input.

Static Logic Generator

There also needed to be a simple way to generate the Static CPU Logic EEPROM image, and modify it as required. (Part of the reason of using ROM-lookup static logic was to eliminate the need for complex SSI-scale hardware and PCB design changes to tweak the functionality.)

I wrote a C# program that allowed the definition of the logic inputs and outputs, along with an ordered list of logic rules (where previous rules take precedence). See the image for how it is used. It made debugging and the semantic checking of the rules less onerous.

EEPROM Programmer

Once the hexadecimal EEPROM image is created (from the State Machine and Static Logic generators, or from the software assembler) it needs to be downloaded into 32KiB EEPROMs.

As an intermediate stage, the images are stored as text files with a CRC32 checksum, and transferred to a Micro SD Card. The text files are numbered 0 to 15. Where 32KiWords are required, one file stores the low bytes and another the high bytes, for programming into two EEPROM devices.

In the absence of an available EEPROM programmer, I designed a simple through-hole PCB that plugged into an Arduino Mega development board, as an Arduino shield. A Micro SD Card reader was included, along with a 4-way DIP switch to select the required image from the card (1 of 16).

The board writes the selected image to the EEPROM, reads it back, and compares the calculated checksum of its programmed contents with the file. The appropriate blinkenlights show the success or failure of the programming/verification steps.

The EEPROM programmer utilises a standard chip carrier socket. It would have been nice to have found an available ZIF (Zero Insertion Force) socket - to save the occasional pin from insertion fatigue.